Frost & Sullivan officially releases the 'Global New Computing Power Chips and Future Key Technology Development Industry Research Report (2026)' | Reconfigurable Data Streams Open a New Chapter in Breaking Through in Computing Power (including access method)

Frost & Sullivan officially releases the 'Global New Computing Power Chips and Future Key Technology Development Industry Research Report (2026)' | Reconfigurable Data Streams Open a New Chapter in Breaking Through in Computing Power (including access method)

Published: 2026/11/07

沙利文正式发布《全球新型算力芯片及未来关键技术发展行业研究报告(2026)》丨可重构数据流开启算力破局新篇章(内附获取方式)

Artificial intelligence has become the core production resource of the digital economy, and computing power is the key infrastructure that supports the continuous evolution of the artificial intelligence industry. As the parameter scale of large models leaps from hundreds of millions to trillions, the demand for training and inference computing power grows exponentially, and the global AI computing chip industry is experiencing unprecedented development opportunities. Meanwhile, traditional general-purpose computing power, represented by GPGPU, faces dual constraints: external regulations and the limitations of Moore’s Law. The new type of AI computing chip, represented by data flow DATAFLOW and ASIC/DSA, is emerging as the key force in addressing three major industry challenges: weak generalizability, low computing efficiency, and weak scalability.


The new type of AI computing chip was created for the new paradigm of AI computing. Against the backdrop of the explosive application of intelligent agents and the large-scale implementation of inference scenarios, its adaptability to low power consumption, low latency, and high reliability becomes increasingly prominent. Compared to traditional general-purpose computing power, the new type of AI computing chip offers unique advantages in energy efficiency, computing efficiency, and scalability, and it can achieve synergistic evolution with algorithm iteration through software-defined hardware. Driven by multiple factors such as policy autonomy and control, the explosive demand for AI computing power, and technological breakthroughs under the constraints of Moore’s Law, the new type of AI computing chip has become the key force in addressing the global differential computing power gap.


In 2026, Frost & Sullivan (hereafter referred to as "SULLIVAN"), officially released the "Global New Type of Computing Chip and Future Key Technology Development Industry Research Report (2026)" (hereafter referred to as the "Report"). The report aims to conduct a comprehensive in-depth analysis of the global new type of AI computing chip industry, exploring the driving factors behind its development from multiple aspects including technical routes, industrial development, market demand, competitive landscape, and corporate practices, uncovering its significant potential for development, and tracking its future development trends.


Scan the QR code to access the report.


The "Global New Type of Computing Chip and Future Key Technology Development Industry Research Report (2026)" begins with the development path of the AI industry and the characteristics of computing power demand, outlining the iteration direction of AI computing chips and the three core challenges facing the industry. It systematically explains the definitions, core capabilities, and representative manufacturers of the two camps: GPGPU and new type of computing chips, and the three technical routes: GPGPU/data flow DATAFLOW/ASIC-DSA. It further analyzes the five core attributes that a high-quality AI computing chip should possess, as well as the evolutionary potential of reconfigurable data flow in technical directions such as compute-network integration, three-dimensional integration, and wafer-level. It also comprehensively presents the competitive landscape in the global new type of AI computing chip field and the product layout and development history of its representative companies, and finally provides a forward-looking assessment of the market size and future development trends of the new type of AI computing chip market.


The following is a excerpt from the Report; for the full content, please scan the QR code.



01

Opportunities in the Computing Chip Industry in the AI Era

01

Evolution of the Artificial Intelligence Development Path


In 2025, the AI industry had transitioned from traditional discriminant AI to the large model stage, and in 2026, it would move toward the intelligent agent stage. Discriminant AI, centered on rules and feature engineering, focuses on single tasks and vertical scenarios, with applications primarily involving recognition and classification. After entering the large model stage, the model parameters grow exponentially from hundreds of millions to trillions—the Transformer architecture provides the foundation, the self-attention mechanism enables large-scale parallel training, and the multi-modal capability, which integrates text, images, audio, and video, accelerates integration. For the application and intelligent agent stages, AI moves from a "tool" to a "generation entity"; the intelligent agent begins to handle complex tasks, and AI applications rapidly penetrate thousands of industries, reshaping the industrial landscape. The two engines of model iteration and demand implementation jointly drive the industry’s deepened evolution.

Source: Frost & Sullivan Research


02

Panoramic Overview of China’s Artificial Intelligence Industry Chain


The artificial intelligence industry chain revolves around three core elements: computing power, algorithms, and data. Upward, it connects computing infrastructure such as chips, servers, and networks; downward, it penetrates into intelligent applications across thousands of industries including finance, manufacturing, transportation, and energy. AI computing power chips serve as the core foundation of the chain, providing essential computing power for model training and inference and being a key component supporting the continuous evolution of the AI industry.

Source: Frost & Sullivan Research


03

Analysis of the Market Size of China’s AI Computing Power Chips


Thanks to the accelerated implementation of artificial intelligence applications, the rapid growth in large model training and inference demand, and sustained investment in computing power infrastructure, the market for China’s AI computing power chips has experienced rapid expansion. According to Frost & Sullivan Research, the market size of China’s AI computing power chips increased from 28.83 billion RMB in 2021 to 20.88 billion RMB in 2025, with a compound annual growth rate of 64.0% from 2021 to 2025. Driven by the industrialization of large models, the construction of computing power clusters, and the digital transformation of industries, the market size is expected to further expand to 161.56 billion RMB by 2030, with a compound annual growth rate of 48.8% from 2026E to 2030E. Overall, the Chinese AI computing power chips market is transitioning from an early exploration phase to a rapid development phase driven by large-scale, high-intensity computing power demand, becoming a critical infrastructure supporting the continuous evolution of the AI industry.

Source: Frost & Sullivan Research


04

Analysis of China’s Intelligent Computing Power Demand


China’s demand for intelligent computing power is surging, and the inference computing power demand will continue to grow at an average annual rate of 70% over the next five years. Driven by the dual engines of training computing power and inference computing power, China’s intelligent computing power demand is entering a period of rapid expansion. From 2021 to 2025, the compound annual growth rate (CAGR) of training computing power was 65.9%, and that of inference computing power was as high as 102%. As the research and development of AI large models, multimodal technology iteration, and other high-computing-power training resources become increasingly rigidly required, and large-scale implementation in multiple industry scenarios such as intelligent manufacturing and smart cities occur, the scale of China’s intelligent computing power from 2026 to 2030 is expected to increase from 1,707.8EFLPOS to 9,835.1EFLPOS, with the CAGRs for training and inference respectively remaining at high levels of 36.5% and 69.7%.


In the future, as the penetration rate of inference computing power continues to rise, the coverage and depth of application in inference scenarios such as intelligent terminal devices and edge service nodes will expand, and their dependence on AI computing power chips with low power consumption, low latency, and high reliability will significantly increase, directly driving the market for new types of AI computing power chips tailored for inference to enter a period of rapid expansion.

Source: Frost & Sullivan Research


02

New Types of AI Computing Power Chip Technology Roadmap and Market

01

Iterative Direction of AI Computing Power Chips


The iterative direction of AI computing power chips depends on the three major challenges currently faced by the industry. First, in terms of generalizability, AI task differences across diverse scenarios and shortened model iteration cycles require chips to accommodate diverse needs and rapid iteration capabilities. Second, in terms of scale expansion capability, the expansion of AI computing clusters to ten-thousand-core levels demands enhanced network interconnection to unlock cluster performance. Third, in terms of computing efficiency, expanding model scale and popularizing AI computing tasks require improving computing efficiency to reduce costs. These three core challenges form the primary driver for the technological evolution of new types of AI computing power chips.

Source: Frost & Sullivan Research


02

Two Camps and Three Core Roadmaps


For the new AI computing paradigm, the global AI chip industry will form two camps in 2026: GPGPU and new types of computing power chips. The new types of computing power chips camp includes two roadmaps: DATAFLOW and ASIC/DSA, which together constitute the three core roadmaps alongside the GPGPU camp.


Route 1 is GPGPU, namely general-purpose graphics processor, originally designed as a hardware component for handling computer graphics rendering, implementing large-scale parallel computing based on the SIMT architecture, and characterized by general applicability, adaptability to multiple algorithm scenarios, and high flexibility. However, its energy efficiency and scenario adaptation flexibility are limited under specific tasks. Route 2 is DATAFLOW, also known as software-defined hardware SDH, a computing system that can dynamically adjust its architecture according to different application requirements, using flexibly reconfigured hardware resources to provide a matching hardware form for specific applications. Its core technical capabilities include reconfigurable operator arrays, data flow scheduling, and software-hardware co-compilation, and it exhibits high energy efficiency and superior computing efficiency. Route 3 is ASIC/DSA, an integrated circuit specifically designed for specific application scenarios, computing tasks, or functional requirements, enabling higher operational efficiency and energy efficiency than general-purpose chips. Its core technical capabilities include dedicated operator acceleration, instruction-level optimization, and model-hardware co-design, and it features high computing efficiency, high energy efficiency, and low computing latency.


To meet the explosive growing computing power demand in the AI era, two technical camps have emerged: general-purpose computing power, represented by GPGPU, and new types of computing power chips, represented by DATAFLOW and ASIC/DSA—three core roadmaps working in tandem, collectively forming the computing power foundation for the development of the artificial intelligence industry.

Source: Frost & Sullivan Research

03

Five Core Characteristics of High-Quality AI Computing Power Chips


Facing industry challenges, future excellent computing power chips will possess five core characteristics. In terms of core performance, the chip must have high computing power; in terms of cost and green development, it must have high energy efficiency; in terms of adaptability to algorithm iteration, it must be flexible; in terms of integration into the mainstream ecosystem, it must be generalizable; and in terms of support for large-scale clusters, it must be scalable. As the core infrastructure for industrial upgrading, an AI computing power chip that combines high computing power, high energy efficiency, flexibility, generalizability, and scalability can overcome the three core challenges of weak generalizability, low computing efficiency, and weak scale expansion capability.

Source: Frost & Sullivan Research


04

New Types of AI Computing Power Chips Copy the Rapid Growth Path of GPGPU


Based on these core characteristics, new types of AI computing power chips will likely copy the rapid growth path of GPGPU. From a policy perspective, GPGPU faces strict external import and export restrictions: the United States imposes strict import and export controls and embargoes on high-end computing chips, and chips such as NVIDIA H200 are subject to the Department of Commerce’s strict “case-by-case review,” locking down manufacturing plants and core EDA tools. From a technical perspective, Moore’s Law is limited and performance improvements are sluggish: Moore’s Law has stalled, frequency growth has stopped, and the traditional GPGPU design faces challenges in integrating advanced integration technologies, with diminishing marginal gains in performance improvement and bottlenecks in system-level expansion. Meanwhile, national policies strongly support the new types of AI computing power chip industry, promoting technological self-sufficiency and control. The “National Data Infrastructure Construction Guidelines” propose “multi-heterogeneous computing power coordination,” and the “Several Policies for Promoting the High-Quality Development of the Integrated Circuit Industry and Software Industry in the New Era” focus on high-end chips, clearly establishing self-sufficiency and controllable computing power as the core goal.


Conversely, regarding the current development of GPGPU, the market is mature and stable, and the competitive landscape is clear: NVIDIA leads globally with a market value of $4.4 trillion, having established an absolute dominance in the GPGPU field since its listing in 1999; MooreThread, as the domestic GPGPU first stock, saw a price surge of 468% on its listing day, raising nearly 8 billion yuan in funds. The technical path for new types of AI computing power chips is gradually becoming clear, and commercial validation is underway: the market is beginning to proactively explore innovative opportunities in the field of new types of computing power chips, with actual deployments in some application scenarios and the formation of verifiable business models (such as Qingwei Intelligence’s Reconfigurable Data Flow and Huawei Ascend, etc.). Leading companies such as Qingwei Intelligence, Groq, and Huawei have already achieved large-scale commercial deployment in the field of new types of AI computing power chips.

Source: Frost & Sullivan Research

05

Reconfigurable Data Flow: Combining High Efficiency and Generalized Flexible Adaptation


The reconfigurable data flow is a computing paradigm that relies on a configurable computing unit array and data flow execution. Through hardware programmability, it enables the dynamic reconfiguration of the operation logic of computing units and the reconfiguration of data paths, allowing general-purpose hardware platforms to precisely match the characteristics of various types of algorithm data flows without hardware iterations. This technology breaks the limitations of traditional dedicated chips, combining the high efficiency of a dedicated computing architecture with the flexible adaptation capabilities of a general-purpose computing platform, and can cover diverse scenarios such as large model training and inference. Its core feature is software-defined computing logic, which, while ensuring computing performance and energy efficiency, reduces the cost of algorithm iteration and hardware adaptation, enabling a new generation of computing architecture that balances flexibility, computing density, and deployment efficiency.


The reconfigurable data flow demonstrates excellent characteristics and development potential across five dimensions: first, high computing power, achieved through PPA extreme optimization and high utilization of computing units; second, high energy efficiency, achieved through storage-computing integration, reducing the single memory access cost; third, scalability, enabled by chip-level direct connection and low construction difficulty for cluster building, allowing low-latency direct connection coordination without additional interconnection devices, enabling the efficient construction of ten-thousand-core level computing power clusters; fourth, flexibility, enabling flexible adaptation to rapidly evolving algorithm logic, with hardware programmability supporting dynamic reconfiguration and online configuration, allowing quick adaptation to different algorithms from CNN to Transformer; fifth, generalizability, capable of adapting to diverse downstream scenarios and being compatible with the mainstream AI development ecosystem, naturally compatible with the RISC-V instruction set, CUDA, and mainstream AI framework ecosystems, and able to integrate with AI software tools such as Triton, allowing direct reuse of the open-source system and toolchain.

Source: Frost & Sullivan Research


06

Highly Evolving Potential of the Reconfigurable Data Flow


The reconfigurable technology is inherently suited for future chip technologies such as compute-network integration, 3D integration, and wafer-level integration. In the context of compute-network integration, the reconfigurable data flow is naturally suited for chip-level direct connection, offering strong scalability, reducing the construction difficulty of clusters from exponential to linear, and minimizing reliance on storage or traditional networks while optimizing chip-to-chip transmission. In 3D integration, the reconfigurable data flow is adapted to vertical stacking computing units and high-density interconnects, enabling a sufficient pool of computing unit resources for dynamic parallel scheduling and breaking the interconnection bottleneck of planar architectures. In wafer-level integration, the interconnection structure built on an entire wafer provides high-consistency, high-density channel resources, meeting the core requirement for high interconnection bandwidth for the large-scale dynamic parallel scheduling of the reconfigurable data flow. The integration of these three technical directions provides the key vehicle for the expanding computing power of the reconfigurable data flow.

Source: Frost & Sullivan Research


07

Prospects for the Market Size of China’s New Types of AI Computing Power Chips


The market size of new types of AI computing power chips equals the market size of AI computing chip market size multiplied by the penetration rate of new types of AI computing power chips. Currently, new types of computing power chips are in the early commercialization stage, with a low penetration rate and initial commercialization capabilities. The core technology remains monopolized by foreign companies, and the computing power demand is primarily for training, resulting in high commercialization costs and a market size in the range of several trillion yuan, only a few billion of it. In the short to medium term, as commercialization and deployment by key customers progress, the penetration rate will gradually increase, and cooperation and research, as well as the software ecosystem, will be largely established. The demand for algorithms will shift from training to inference, and the supply side will form a preliminary scale, reaching several trillion yuan. In the long term, as technology matures and large-scale deployment occurs, the penetration rate will approach its peak, and with scale effects and deepening collaboration, a fully mature ecosystem will be implemented, with multiple fields achieving original breakthroughs and a strategic overtaking. The demand will focus on configuration and inference, with the supply side forming a systematic ecosystem cluster, reaching the trillion-yuan level. The market size of China’s new types of AI computing power chips will exceed the trillion-yuan range over the next five years.

Source: Frost & Sullivan Research


03

Competitive Landscape and Representative Companies of New Types of AI Computing Power Chips

01

Panoramic Overview of Global New Types of AI Computing Power Chip Manufacturers


The global new types of AI computing power chip field has formed a mainstream manufacturer panorama represented by DATAFLOW and ASIC/DSA. In the DATAFLOW route, representative manufacturers include Sambanova (established in 2017, product being the DataScale system equipped with the RDU chip, whose core technology has been acquired by NVIDIA), Groq (established in 2016, product being the LPU chip, with no current listing plan), and Qingwei Intelligence (established in 2018, products being the TX5 and TX8 series, preparing for listing); in the ASIC/DSA route, representative manufacturers include Huawei (established in 1987, product being the Ascend series, with no current listing plan) and Hanboji (established in 2016, product being the MLU series Si Yuan, already listed on the stock exchange as 688256.SH).

Source: Frost & Sullivan Research


02

Breaking the “Software Ecosystem Constraint”: Domestic Chips From “Usable” to “Good to Use”


Currently, enterprises engaged in new types of AI computing power chips have a leading number of adaptation modules, demonstrating the growth potential of the new architecture within the open-source ecosystem and making them a top player in China’s AI ecosystem. At the compiler and programming ecosystem level, they enable zero-edit integration into the model ecosystem via PTX-level RISC-V instruction set compatibility and seamless adaptation to PyTorch/TensorFlow, allowing for seamless access to the model ecosystem and compatibility with the CUDA API, enabling seamless migration of existing code. They also develop self-developed AI computing chip and supporting software stack, which can significantly reduce the effort and cost of code modification and migration. In the large model training and inference aspects, their self-developed, fully functional software stack enables full-stack compatibility, reducing time, effort, and hassle in development, porting, iteration, and optimization. At the open-source ecosystem construction level, they collaborate with industry alliances to actively participate in the construction of the FlagOS open-source ecosystem. At the 2026 WAIC conference, Qingwei Intelligence officially launched the fully self-developed RAISA software stack (Reconfigurable AI System Architecture), continuously promoting domestic chips from “usable” to “good to use”.

Source: Frost & Sullivan Research


04

Analysis of the Future Development Trend of the Market for New Types of AI Computing Power Chips

01

Analysis of the Core Market Driving Factors


The explosive growth of enterprises engaged in new types of AI computing power chips is driven by both demand and supply sides. On the demand side, the AI computing power gap continues to widen: training computing power is growing exponentially, and the number of parameters in large models has soared from billions to trillions; the inference scenario explosion, with applications such as AI Agents, has made the inference computing power demand more than 10 times that of training. On the supply side, domestic substitution and technology supply disruptions force self-sufficiency and control: NVIDIA occupies the majority of the market, creating a bottleneck risk; China has included AI chips in its national strategy, and local governments have introduced “computing power vouchers,” opening up a vast market space for domestic new types of AI computing power chips.


02

Analysis of the Capital Market Performance of Related Enterprises


Whether they are GPGPU companies or new type of computing chip companies, they are sought after by the market and enjoy high valuation benefits. MooreThread performed well on the first day of listing, opening higher by 468% on the first day, briefly rising to 688 yuan per share during the session, and closing at 600.50 yuan per share, up 425.46%, with a market value reaching 282.252 billion yuan; TianShiSiXin listed more than two months ago, with its stock price increasing by 55.2%; BiRen Technology opened higher by 82.14% on the first day of listing, closing at 34.46 Hong Kong dollars per share on the day, up 75.82%, with a market value reaching 82.6 billion Hong Kong dollars.


From the acquisition perspective, NVIDIA chose to acquire Groq in order to fill its shortcomings in the AI inference sector and secure the core technology and top-tier team for the LPU architecture. The transaction value was $20 billion, nearly tripling the Groq’s valuation of $0.69 billion three months prior, indicating a significant premium. New type of computing chip companies may follow NVIDIA’s path of acquiring Groq, achieving high valuations for GPU companies.

Source: Frost & Sullivan Research


03

Learning from Others: Seeing the Future of the New Type of AI Computing Chip from the Current State of the New Energy Vehicle Industry


The new type of computing chip and the new energy vehicle share a common industrial logic. The new energy vehicle also uses software-defined hardware to enable continuous OTA iterative upgrades of vehicle functions, breaking traditional hardware constraints; the new type of computing chip, using software-defined hardware, allows the chip to dynamically reorganize in real time according to different AI tasks, balancing efficiency and flexibility. Both operate resonance at the demand, technical, and market levels: on the demand side, the growing, large-scale application opens up space; on the technical side, architectural innovation breaks traditional hardware constraints; on the market side, scale leap is achieved as penetration rates increase. From the current state of the Chinese new energy vehicle industry, we can see the future of the new type of AI computing chip.

Source: Frost & Sullivan Research


04

Prospects for Future Development Trends


The market size of future new AI computing chips will further grow, and industry supervision and regulation will become more robust. The next-generation new AI computing chips are expected to meet the demand in more AI scenarios, enhancing product accessibility and acceptance. Currently, a number of domestic companies have emerged that possess innovation capabilities and technical strength comparable to international levels; the Chinese manufacturer represented by Qingwei Intelligence’s products, which exhibit innovative and implementation advantages, are likely to capture a certain market share in the global competition. The three new global AI chip development trends are thriving, and the new AI chips are moving into the trillion-yuan blue ocean with five key characteristics.

Source: Frost & Sullivan Research






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Frost & Sullivan China

Senior Partner and Managing Director, Jia Pang

Email:

sean.jia@frostchina.com


Frost & Sullivan China

Executive Director, Wang Gengye

Email:

gengye.wang@frostchina.com





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沙利文正式发布《全球新型算力芯片及未来关键技术发展行业研究报告(2026)》丨可重构数据流开启算力破局新篇章(内附获取方式)